The Omron NX1P2-9024DT, also cataloged as the NX1P2-9024DT Sysmac NX1P CPU, operates as a dedicated hardware component for sequence control and motion execution within EtherCAT and EtherNet/IP networks. Driven by a 2 ms primary task cycle, the processor executes control programs using 1.5 MB of program memory and 2 MB of variables memory. Integrated fieldbus interfaces enable real-time coordination with remote I/O slice blocks and servo drives.

Model Structure & Functional Nomenclature

• NX1P2: Compact all-in-one CPU controller platform with integrated I/O.
• 9024: Integrated I/O hardware profile featuring 24 built-in digital I/O points.
• D: Direct current (DC) logic power supply input requirement.
• T: Transistor output circuit configuration (PNP/NPN switching output terminals).

Hardware Specifications Summary

Deterministic Industrial Networking & Bus Scalability

Operating across Profinet / EtherNet/IP deterministic networks alongside EtherCAT master loops, the controller coordinates field node synchronization. Backplane bus communication velocity guarantees real-time cycle updates between the central CPU and side-attached local NX I/O modules. The internal architecture maintains I/O density scaling and full firmware flash compatibility through Sysmac Studio setup utilities.

Commercial Deliverable Items

• 1 x Omron NX1P2-9024DT Sysmac NX1P CPU Controller
• 1 x Terminal Block Set for I/O and Power Wiring
• 1 x End Cover Block (NX-END02)

Field Mounting & Wiring Protocol

• DIN Rail Mounting: Seat the upper mounting hooks onto a standard 35 mm DIN rail and press the main chassis backward until the lower DIN clip locks.
• EtherCAT Master Wiring: Connect Category 5e shielded twisted-pair cables from the EtherCAT port to downstream slave drives using RJ45 connectors.
• Power Connection: Supply regulated 24 VDC power (20.4 to 28.8 VDC range) to the terminal block, confirming correct DC terminal polarity.
• Panel Grounding: Secure a dedicated functional ground conductor from the main chassis grounding point to the panel earth rail.
• Bus Termination: Place the mandatory NX end cover module on the rightmost edge of the assembly to seal the internal backplane bus.

Frequently Asked Questions

• Can local expansion NX I/O modules be hot-swapped while the CPU is powered?

  No. Main 24 VDC system power must be disconnected before installing or removing local side-expansion NX I/O units.

• What communication protocols are supported on the built-in Ethernet ports?

  The unit features integrated interfaces for EtherCAT Master, EtherNet/IP industrial protocol, and standard Ethernet TCP/IP.

• What is the input operating voltage range for the controller?

  The CPU operates within a 20.4 VDC to 28.8 VDC power supply window, requiring a stable external 24 VDC power source.

• How much memory is allocated for execution logic and variable storage?

  The processor contains 1.5 MB of dedicated program memory for logic execution and 2 MB of memory for process variables.

• What task cycle time does the processor core achieve during control execution?

  The main processing core executes deterministic control loops at a fixed primary task cycle time of 2 ms.

• Why is the end cover block required on the right side of the unit?

  The end cover protects exposed backplane contact pins and maintains proper bus termination for local I/O expansion modules.

• How are project files and parameters downloaded to the controller hardware?

  Programs and configuration parameters are loaded directly via Sysmac Studio using an Ethernet network connection.

• What role does the EtherCAT Master port serve in motion applications?

  The EtherCAT Master port transmits high-speed cyclic position and velocity data to synchronized servo drives and distributed I/O.